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Last year, Intel announced the development of the Horse Creek platform, a new high-performance RISC-V development system in partnership with SiFive as part of the company's Intel Foundry Services (IFS), and efforts to promote RISC-V adoption. The boards are said to be a continuation of SiFive's own HiFive boards, designed to grow the RISC-V ecosystem and accelerate prototyping.

Earlier this year, Intel also announced the IFS Accelerator Ecosystem Alliance, which aims to help accelerate chip prototyping and rollout through deep collaboration with various semiconductor partners on EDA, IP and design services. The IFS Accelerator is a comprehensive set of tools that includes a silicon-proven portfolio of Intel-specific process-optimized IP (from standard cell libraries, memory, GP I/O, analog, and I/F IP). Strategically speaking, a large and dynamic ecosystem will be extremely important to the success of Intel's foundry strategy, and the IFS accelerator is one of them. The company initially launched the accelerator in September 2021 to assist the automotive industry transition to more advanced nodes, however, it has since expanded its efforts to other areas.

Notably, SiFive, a member of the IFS Accelerator, said: "SiFive will enable IFS' customers to create computing platforms featuring RISC-V optimized for their market applications. Intel's broad IP portfolio is a great addition to SiFive's Complements our portfolio of performance-driven processor IP, such as the SiFive Intelligence and SiFive Performance families of processor IP."

At the recent Intel Innovation 2022 developer conference, the company made its first public demonstration of Horse Creek. Horse Creek is a RISC-V software development board inspired by the Raspberry Pi. It's physically larger and much more performant thanks to the plethora of integrated interfaces, such as 8GB of DDR5 onboard, a PCIe 5.0 slot, SPI flash including U-Boot, and countless other monitoring and debugging interfaces.

In 18 months, Horse Creek went from a text announcement to an A0 stepping chip that could run Linux in its entirety. Manufactured using the company's most advanced Intel 4 Process process, the chip measures just 4mm x 4mm and is packaged in a 19mm x 19mm BGA package. The chip is also intended to demonstrate the interoperability of third-party controllers and IP with Intel's own hard IP PHYs. Therefore, the SoC itself integrates many advanced interfaces.

The SoC itself integrates a quad-core SiFive P550 RISC-V core. Each core has its own L1 and L2 caches, with a shared last-level cache -- all running at 2.2GHz.

The SoC integrates Intel's own PCIe 5.0 PHY with a Synopsys PCIe 5 controller with x8 lanes. It also integrates Intel's DDR5 PHY, which supports 5600MT/s rate, and Cadence's memory controller. There are also Intel 4 IPs including 2 MB of shared SRAM (part of the memory compiler), process monitor, cache, power/clock/PLL, e-fuse, JTAG and various cell libraries.

Horse Creek was able to boot Linux without a hitch, and Intel even demonstrated using the chip to execute games (drawing on the CPU since there is no GPU) and various other applications (media player, playback, browser, etc.).

About a month ago, Intel also announced Intel Pathfinder for RISC-V, a rapid prototyping environment for system integrators. Essentially, it is a suite of IP, middleware, open source and third-party tools, and operating system support designed to simplify the exploration of RISC-V-based pre-silicon designs. Intel said it is working with commercial and open-source RISC-V IP vendors to provide a consistent environment for software development across different RISC-V-based processors. On the commercial side, RISC-V core IP includes IP from Andes, Codasip, SiFive, MIPS and others. Pathfinder includes several FPGA platforms for RISC-V chip emulation. The starter version utilizes Intel Pathfinder's Terasic development kit, while commercial tools include Stratix 10 GX-based boards for full chip emulation capabilities.

A launch date for the new Horse Creek development board has not been announced.